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MJE13005
Preferred Device
SWITCHMODEt Series NPN Silicon Power Transistors
These devices are designed for high-voltage, high-speed power switching inductive circuits where fall time is critical. They are particularly suited for 115 and 220 V SWITCHMODE applications such as Switching Regulator's, Inverters, Motor Controls, Solenoid/Relay drivers and Deflection circuits.
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* VCEO(sus) 400 V * Reverse Bias SOA with Inductive Loads @ TC = 100_C * Inductive Switching Matrix 2 to 4 A, 25 and 100_C tc @ 3A, * 700 V Blocking Capability * SOA and Switching Applications Information * Pb-Free Package is Available*
MAXIMUM RATINGS
Rating Collector-Emitter Voltage Collector-Emitter Voltage Emitter-Base Voltage Collector Current Base Current Emitter Current - Continuous - Peak (Note 1) - Continuous - Peak (Note 1) - Continuous - Peak (Note 1) Symbol VCEO(sus) VCEV VEBO IC ICM IB IBM IE IEM PD PD TJ, Tstg Value 400 700 9 4 8 2 4 6 12 2 16 75 600 -65 to +150 Unit Vdc Vdc Vdc Adc Adc Adc
4 AMPERE NPN SILICON POWER TRANSISTOR 400 VOLTS - 75 WATTS
100_C is 180 ns (Typ)
1
2
TO-220AB CASE 221A-09 STYLE 1 3
MARKING DIAGRAM
MJE13005G W W/_C W W/_C _C A Location Y WW G age Device MJE13005 MJE13005G = Assembly = Year = Work Week = Pb-Free PackAY WW
Total Device Dissipation @ TC = 25_C Derate above 25C Total Device Dissipation @ TC = 25_C Derate above 25C Operating and Storage Junction Temperature Range
THERMAL CHARACTERISTICS
Characteristics Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case Maximum Lead Temperature for Soldering Purposes 1/8 from Case for 5 Seconds Symbol RqJA RqJC TL Max 62.5 1.67 275 Unit _C/W _C/W _C
ORDERING INFORMATION
Package TO-220 TO-220 (Pb-Free) Shipping 50 Units / Rail 50 Units / Rail
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Pulse Test: Pulse Width = 5 ms, Duty Cycle 10%. *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2006
Preferred devices are recommended choices for future use and best overall value.
1
February, 2006 - Rev. 7
Publication Order Number: MJE13005/D
II I I I III I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I IIIIIIII IIIIIIIIIIIIII I II I I IIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIII I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I II I III I I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIII IIIIIIII IIIIIIIIIIIIII I II I I III IIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIII III IIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I III I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII I I III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II IIII II I II IIII IIIIIII IIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I I II I III I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII IIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIIIIIIIIIIIIIIIIIII II II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIII I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIII
2. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%. SWITCHING CHARACTERISTICS DYNAMIC CHARACTERISTICS ON CHARACTERISTICS (Note 2) SECOND BREAKDOWN OFF CHARACTERISTICS (Note 2)
ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Fall Time
Crossover Time
Voltage Storage Time
Inductive Load, Clamped (Table 2, Figure 13)
Fall Time
Storage Time
Rise Time
Delay Time
Resistive Load (Table 2)
Output Capacitance (VCB = 10 Vdc, IE = 0, f = 0.1 MHz)
Current-Gain - Bandwidth Product (IC = 500 mAdc, VCE = 10 Vdc, f = 1 MHz)
Base-Emitter Saturation Voltage (IC = 1 Adc, IB = 0.2 Adc) (IC = 2 Adc, IB = 0.5 Adc) (IC = 2 Adc, IB = 0.5 Adc, TC = 100_C)
Collector-Emitter Saturation Voltage (IC = 1 Adc, IB = 0.2 Adc) (IC = 2 Adc, IB = 0.5 Adc) (IC = 4 Adc, IB = 1 Adc) (IC = 2 Adc, IB = 0.5 Adc, TC = 100_C)
DC Current Gain (IC = 1 Adc, VCE = 5 Vdc) (IC = 2 Adc, VCE = 5 Vdc)
Clamped Inductive SOA with Base Reverse Biased
Second Breakdown Collector Current with base forward biased
Emitter Cutoff Current (VEB = 9 Vdc, IC = 0)
Collector Cutoff Current (VCEV = Rated Value, VBE(off) = 1.5 Vdc) (VCEV = Rated Value, VBE(off) = 1.5 Vdc, TC = 100_C)
Collector-Emitter Sustaining Voltage (IC = 10 mA, IB = 0)
(VCC = 125 Vdc, IC = 2 A, IB1 = IB2 = 0.4 A, tp = 25 ms, Duty Cycle v 1%)
(IC = 2 A, Vclamp = 300 Vdc, IB1 = 0.4 A, VBE(off) = 5 Vdc, TC = 100_C)
Characteristic
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MJE13005
2 VCEO(sus) Symbol RBSOA VCE(sat) VBE(sat) IEBO ICEV Cob hFE IS/b tsv fT td tfi tr tf tc ts Min 400 10 8 - - - - - - - - 4 - - - - - - - - - - - - 0.025 0.16 0.32 Typ 0.9 0.4 1.7 0.3 65 - - - - - - - - - - - - - - See Figure 12 See Figure 11 Max 0.9 0.9 0.7 0.1 1.2 1.6 1.5 0.5 0.6 1 1 60 40 4 4 - - 1 1 5 - - mAdc mAdc MHz Unit Vdc Vdc Vdc pF ms ms ms ms ms ms ms -
MJE13005
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS 100 70 hFE , DC CURRENT GAIN 50 25C 30 20 -55 C TJ = 150C 2 TJ = 25C 1.6 IC = 1 A 1.2 2A 3A 4A
0.8
10 7 5 0.04 0.06
VCE = 2 V VCE = 5 V 0.1 0.2 0.4 0.6 1 IC, COLLECTOR CURRENT (AMP) 2 4
0.4 0 0.03
0.05
0.1
0.2 0.3 0.5 0.7 IB, BASE CURRENT (AMP)
1
2
3
Figure 1. DC Current Gain
Figure 2. Collector Saturation Region
VCE(sat) , COLLECTOR-EMITTER SATURATION VOLTAGE (VOLTS)
VBE, BASE-EMITTER VOLTAGE (VOLTS)
1.3 1.1 VBE(sat) @ IC/IB = 4 VBE(on) @ VCE = 2 V TJ = -55C 25C 0.7 25C 0.5 150C 0.3 0.04 0.06 0.1 0.2 0.4 0.6 1 2 4
0.55 IC/IB = 4 0.45 TJ = -55C 25C 0.25 0.15
0.9
0.35
150C
0.05 0.04 0.06
0.1
0.2
0.4
0.6
1
2
4
IC, COLLECTOR CURRENT (AMP)
IC, COLLECTOR CURRENT (AMP)
Figure 3. Base-Emitter Voltage
Figure 4. Collector-Emitter Saturation Voltage
10 k VCE = 250 V IC, COLLECTOR CURRENT ( A) 1k TJ = 150C 100 125C 100C 10 1 0.1 -0.4 75C 50C 25C REVERSE FORWARD -0.2 0 +0.2 +0.4 VBE, BASE-EMITTER VOLTAGE (VOLTS) +0.6 C, CAPACITANCE (pF)
2k 1k 700 500 300 200 100 70 50 30 20 0.3 0.5 13 5 10 30 50 VR, REVERSE VOLTAGE (VOLTS) 100 Cob 300 Cib
Figure 5. Collector Cutoff Region
Figure 6. Capacitance
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MJE13005
ICPK 90% Vclamp IC tsv trv tc VCE IB 90% IB1 10% Vclamp 10% ICPK 2% IC Vclamp 90% IC tfi tti
TIME
Figure 7. Inductive Switching Measurements
t, TIME ( s)
0.1 0.05 0.02 0.01 0.04 td @ VBE(off) = 5 V
t, TIME ( s)
IIII I I I IIIIII I III IIIIIIIIIIIIIIIII IIII I IIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIII IIIIII IIIIII IIII IIIIIIIIIIIIII IIIII IIIIIIIIIIIIIIIII IIIII I IIIIIIIIIIIIIIIII IIIIII IIII IIIIIIIIIIIIIIII IIIIII IIIIII IIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIII IIIIIIIIIIIIII
IC AMP 2 3 4 TC _C tsv ns trv ns tfi ns tti ns tc ns 25 100 25 100 25 100 600 900 650 950 550 850 70 110 100 240 140 330 160 350 80 130 60 100 180 320 200 350 220 390 60 100 70 110 100 160 NOTE: All Data recorded in the inductive Switching Circuit In Table 2. 1 0.5 tr 0.2 VCC = 125 V IC/IB = 5 TJ = 25C 0.1 0.2 0.4 1 2 4 IC, COLLECTOR CURRENT (AMP)
Table 1. Typical Inductive Switching Performance
SWITCHING TIMES NOTE In resistive switching circuits, rise, fall, and storage times have been defined and apply to both current and voltage waveforms since they are in phase. However, for inductive loads which are common to SWITCHMODE power supplies and hammer drivers, current and voltage waveforms are not in phase. Therefore, separate measurements must be made on each waveform to determine the total switching time. For this reason, the following new terms have been defined. tsv = Voltage Storage Time, 90% IB1 to 10% Vclamp trv = Voltage Rise Time, 10-90% Vclamp tfi = Current Fall Time, 90-10% IC tti = Current Tail, 10-2% IC tc = Crossover Time, 10% Vclamp to 10% IC An enlarged portion of the inductive switching waveforms is shown in Figure 7 to aid in the visual identity of these terms. For the designer, there is minimal switching loss during storage time and the predominant switching power losses occur during the crossover interval and can be obtained using the standard equation from AN-222:
PSWT = 1/2 VCCIC(tc)f
In general, t rv + t fi ] t c. However, at lower test currents this relationship may not be valid. As is common with most switching transistors, resistive switching is specified at 25C and has become a benchmark for designers. However, for designers of high frequency converter circuits, the user oriented specifications which make this a "SWITCHMODE" transistor are the inductive switching speeds (tc and tsv) which are guaranteed at 100_C.
RESISTIVE SWITCHING PERFORMANCE
10 5 2 1 0.5 0.3 0.2 0.1 0.04 0.1 0.2 0.5 1 2 4 tf ts VCC = 125 V IC/IB = 5 TJ = 25C
IC, COLLECTOR CURRENT (AMP)
Figure 8. Turn-On Time
Figure 9. Turn-Off Time
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MJE13005
Table 2. Test Conditions for Dynamic Performance
REVERSE BIAS SAFE OPERATING AREA AND INDUCTIVE SWITCHING +5 V 1N4933 33 MJE210 0.001 mF TEST CIRCUITS 5V PW DUTY CYCLE 10% tr, tf 10 ns 68 1k 33 1N4933 2N222 2 1k +5 V 1N493 3 0.02 mF 270 1k 2N2905 47 100 1/2 W MJE200 - VBE(off) VCC = 125 V RC = 62 W D1 = 1N5820 or Equiv. RB = 22 W +10 V 25 ms RB IB T.U.T. IC 5.1 k 51 -4.0 V Vclamp *SELECTED FOR 1 kV VCE D1 TUT RB SCOPE RESISTIVE SWITCHING
VCC +125 V L MR826* RC
NOTE PW and VCC Adjusted for Desired IC RB Adjusted for Desired IB1
CIRCUIT VALUES
Coil Data: Ferroxcube Core #6656 Full Bobbin (~16 Turns) #16
GAP for 200 mH/20 A Lcoil = 200 mH OUTPUT WAVEFORMS
VCC = 20 V Vclamp = 300 Vdc
TEST WAVEFORMS
IC IC(pk)
tf CLAMPED tf UNCLAMPED t2 t t1 tf
t1 ADJUSTED TO OBTAIN IC t1 t2
Lcoil (IC pk)
VCC
Lcoil (IC pk)
Test Equipment Scope-Tektronics 475 or Equivalent
0 -8 V tr, tf < 10 ns Duty Cycle = 1.0% RB and RC adjusted for desired IB and IC
VCE
VCE or Vclamp TIME t2
t
Vclamp
r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED)
1 0.7 0.5 0.3 0.2 0.1 0.07 0.05 0.03 0.02 0.01 0.01
D = 0.5 0.2 0.1 0.05 0.02 0.01 SINGLE PULSE 0.02 0.05 0.1 0.2 0.5 1 ZqJC(t) = r(t) RqJC RqJC = 1.67C/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) ZqJC(t) 2 5 t, TIME (ms) 10 20 50 P(pk)
t1
t2
DUTY CYCLE, D = t1/t2 100 200 500 1k
Figure 10. Typical Thermal Response [ZqJC(t)]
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MJE13005
SAFE OPERATING AREA INFORMATION
The Safe Operating Area Figures 11 and 12 are specified ratings for these devices under the test conditions shown. 10 500 ms IC(pk) , COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP) 5 2 1 0.5 0.2 0.1 1 ms dc 5 ms 4 TC 100C IB1 = 2.0 A 3
2
VBE(off) = 9 V
0.05 0.02 0.01 MJE13005 5 7 10 20 30 50 70 100 200 300 VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS) 500 400
1 MJE13005 0 5V 3V 1.5 V 700 800
0
100
200
300
400
500
600
VCE, COLLECTOR-EMITTER CLAMP VOLTAGE (VOLTS)
Figure 11. Forward Bias Safe Operating Area FORWARD BIAS
Figure 12. Reverse Bias Switching Safe Operating Area REVERSE BIAS
There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC - VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 11 is based on TC = 25_C; T J(pk) is variable depending on power level. Second breakdown pulse limits are valid for duty cycles to 10% but must be derated when TC 25_C. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the voltages shown on Figure 11 may be found at any case temperature by using the appropriate curve on Figure 13. T J(pk) may be calculated from the data in Figure 10. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown.
1
For inductive loads, high voltage and high current must be sustained simultaneously during turn-off, in most cases, with the base to emitter junction reverse biased. Under these conditions the collector voltage must be held to a safe level at or below a specific value of collector current. This can be accomplished by several means such as active clamping, RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Bias Safe Operating Area and represents the voltage-current conditions during reverse biased turn-off. This rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. Figure 12 gives the complete RBSOA characteristics.
POWER DERATING FACTOR
0.8 0.6
SECOND BREAKDOWN DERATING
THERMAL DERATING
0.4
0.2 0
20
40
60
80
100
120
140
160
TC, CASE TEMPERATURE (C)
Figure 13. Forward Bias Power Derating
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MJE13005
PACKAGE DIMENSIONS
TO-220AB CASE 221A-09 ISSUE AA
-T- B
4
SEATING PLANE
F T S
C
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 --- --- 0.080 BASE COLLECTOR EMITTER COLLECTOR MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 --- --- 2.04
Q
123
A U K
H Z L V G D N R J
STYLE 1: PIN 1. 2. 3. 4.
SWITCHMODE is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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MJE13005/D

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